The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventor(s), to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of riling, are neither expressly nor impliedly admitted as prior art against the present disclosure.
With advancement in memory technology, native burst length of memories is also increasing. In an example, a cache is coupled to a memory. If a length of the cache lines of the cache (i.e., a native burst length of the cache) is less compared to a native burst length of the memory (e.g., if the native burst length of the cache is 32 bytes, and the native burst length of the memory is 64 bytes), it may result in a sub-optimal accessing of the memory by the cache.